INTRODUCTION
The FPGA trainer is a versatile
tool for experimenting with standard FPGAs / CPLDs with
provision to mount a daughter board on the base board.
The daughter board comes
with various FPGA and CPLD options from XILINX and ALTERA.
It also provides test pins to connect Pattern generator
and Logic analyzer to connect various Inputs and Outputs
of the FPGA. Apart from this the base board contains various
interface options to readily connect switches and displays
etc. A number of tutorial exercises have been worked out.
An exhaustive easy to follow documentation has been provided
for quick learning of various environments, schematic and
VHDL programming.
| BASE BOARD |
 |
32
Toggle switches for I/P selection with 32 LEDs to
indicate switch status |
 |
32 LEDs connected
to output ports of the FPGA |
 |
Two line X 16 Alpha-Numeric
LCD display with back-light |
 |
Four digit 7-segment
display |
 |
4 X 4 key matrix |
 |
2 nos. of Push
button switches |
 |
On board 10 MHz
oscillator |
 |
10 MHz clock and
one of four different frequency clocks (5Mhz, 1Mhz,
500Khz and 100Khz) |
 |
User I/Os available
for Pattern generator and Logic Analyzer connection |
 |
Standard VGA, PS-2
and RS-232 serial interface connectors are provided |
 |
On-board different
supply voltage generator to match the multi-volt with
LED indication |
 |
FPGA/CPLD of different
makes (1.8V, 2.5V, 3.3V, 5V) with LEDs to identify
the card type |
 |
26-pin FRC connector
for connecting to ALS standard interface boards like
Stepper motor, ADC, DAC, Traffic light controller,
Elevator, Printer interface etc |
 |
Four sets of 20
X 2 female berg connectors to plug the child card |
| DAUGHTER BOARD -
1 |
 |
XILINX XC3S50 – FPGA IC
with 1 MB ROM for stand alone programming |
 |
Push-button switch to re-initialise
the FPGA |
 |
Four sets of 20 X 2 berg connectors
for plugging on to the main board |
 |
JTAG connector for boundary scan programming |
 |
Mode selection jumpers |
| DAUGHTER BOARD -
2 |
 |
XILINX XC9572PC84 – CPLD
IC |
 |
Four sets of 20 X 2 berg connectors
for plugging on to the main board |
 |
JTAG connector for boundary scan programming |
| DAUGHTER BOARD -
3 |
 |
ALTERA EP1C6PQ240C8 – FPGA
IC. With 1 MB ROM for stand alone programming |
 |
Push-button switch to re-initialise
the FPGA |
 |
Four sets of 20 X 2 berg connectors
for plugging on to the main board |
 |
JTAG connector for boundary scan programming |
 |
Mode selection jumpers |
DAUGHTER BOARD
- 4
|
 |
XILIN X FPGA X C3S400 with
N V ROM |
System
requirements for SDA-CPLD/FPGA Trainer Kit are 256 MB RAM
with Operating system of Windows XP/ 2000, CD ROM drive
and Internet Connections.
|