ALS-SDA - CPLD / FPGA - 01
ALS-SDA- CPLD / FPGA - 02
ALS-SDA-FPGA - 03
ALS-SDA- CPLD / FPGA - 04

 

 INTRODUCTION

The FPGA trainer is a versatile tool for experimenting with standard FPGAs / CPLDs with provision to mount a daughter board on the base board.

The daughter board comes with various FPGA and CPLD options from XILINX and ALTERA. It also provides test pins to connect Pattern generator and Logic analyzer to connect various Inputs and Outputs of the FPGA. Apart from this the base board contains various interface options to readily connect switches and displays etc. A number of tutorial exercises have been worked out. An exhaustive easy to follow documentation has been provided for quick learning of various environments, schematic and VHDL programming.

 

BASE BOARD
32 Toggle switches for I/P selection with 32 LEDs to indicate switch status
32 LEDs connected to output ports of the FPGA
Two line X 16 Alpha-Numeric LCD display with back-light
Four digit 7-segment display
4 X 4 key matrix
2 nos. of Push button switches
On board 10 MHz oscillator
10 MHz clock and one of four different frequency clocks (5Mhz, 1Mhz, 500Khz and 100Khz)
User I/Os available for Pattern generator and Logic Analyzer connection
Standard VGA, PS-2 and RS-232 serial interface connectors are provided
On-board different supply voltage generator to match the multi-volt with LED indication
FPGA/CPLD of different makes (1.8V, 2.5V, 3.3V, 5V) with LEDs to identify the card type
26-pin FRC connector for connecting to ALS standard interface boards like Stepper motor, ADC, DAC, Traffic light controller, Elevator, Printer interface etc
Four sets of 20 X 2 female berg connectors to plug the child card

 

DAUGHTER BOARD - 1
XILINX XC3S50 - FPGA IC with 1 MB ROM for stand alone programming
Push-button switch to re-initialise the FPGA
Four sets of 20 X 2 berg connectors for plugging on to the main board
JTAG connector for boundary scan programming
Mode selection jumpers

 

DAUGHTER BOARD - 2
XILINX XC9572PC84 - CPLD IC
Four sets of 20 X 2 berg connectors for plugging on to the main board
JTAG connector for boundary scan programming

 

DAUGHTER BOARD - 3
ALTERA EP1C6PQ240C8 - FPGA IC. With 1 MB ROM for stand alone programming
Push-button switch to re-initialise the FPGA
Four sets of 20 X 2 berg connectors for plugging on to the main board
JTAG connector for boundary scan programming
Mode selection jumpers

 

DAUGHTER BOARD - 4

XILIN X FPGA X C3S400 with N V ROM

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Four sets of 52X3 Berg Male connectors provided-to one row lines from FPGA/CPLD are terminated, one Row to VCC and one row to GND The Berg pins for VCC and GND allows a number of Experiments to be conducted, which requires these Inputs 16 outputs from output ports pin (GPGA/CPLD) connected to LEDs through 10 Pin FRC connectors 16 X 2 Alpha Numeric LCD display with back-light connected through 10 Pin FRC connectors to FPGA/CPLD port pins.
Four digit 7 segment displays connected through 10 Pin FRC connectors to FPGA/CPLD port pins.
4 X 4 key matrix connected through 10 Pin FRC connectors to FPGA/CPLD port pins.
10 Mhz, 5 Mhz, 1Mhz,500Khz, 100Khz-five different clock frequencies.
  Onboard multiple Dc supply voltage generator with LED indication.
  Four sets of 30X2 Male Berg connectors to plug the daughter board.
  A number of sample program for experiments and to demonstrate the interfacing capalbilites.
  26 pin FRC cable for connecting to ALS standard interface like ADC, DAC, DC motors etc.
  Number of flying leads are provided for external connectors.
  Four numbers of 10 Pin FRC cables.

 

DAUGHTER BOARD -1 XC3S50 BOARD

NVROM for stand alone programming
Ten 10 Pin FRC connectors around the daughter board for connection to the on board interfaces like 7 segment LCD etc.
JTAG connector (10 pin FRC connector/6 Pin reliamate)for boundary scan programming
Mode selection jumpers
Four sets of 30X 2 female berg connector for plugging
On the main road

 

DAUGHTER BOARD-2 XC9572 BOARD

Xilinix SC9572PC84 CPLD
Seven 10 Pin FRC connectors around the daughter
Board for connection to the on board interfaces like
Key matrix, LCD etc.,
JTAG connector (10 PIN FRC connector/6 PIN reliamate) for boundary scan programming
Four sets of 30 X 2 female Berg connector for
Plugging on to the main board

 

DAUGHTER BOARD 3 XC3S400 BOARD

Xilinx SC3S400 FPGA
NVROM for stand alone programming
Ten 10 PIN FRC connectors around the daughter board for connection to the on board interfaces
Like 7 segment, LCD etc.,
JTAG connector (10 PIN FRC connector/6 PIN reliamate)for boundary scan programming
Mode selection jumpers
Four sets of 30 X 2 female berg connector for plugging on to the main board

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ALS-SDA-FPGA-03 TRAINER is a toll for understanding the capabilities of an industry standard FPGA. The board contains various interface options including Switches LEDs, LCD, seven segment display, key matrix, relay, buzzer, Traffic light simulator, Dc motor interface.

16 inputs using DIP switches.
16 outputs through output sports of FPGA connected to LEDs
16x2 Alpha-Numeric LCD display with back-light.
Four – digit 7 segment displays.
4x4 key matrix
10Mhz clock and one of four different clocks (5Mhz, 1Mhz,500KHz,100KHz)
on-board Buzzer.
  On- board DPDT relays.
  On-board Traffic light Simulator
  On-board Dc motor interface with 2 pin connection to external DC motor.
  On-board multiple Dc supply voltage generator
  26 pin FRC cable for connecting to ALS standard interfaces like ADC, DAC Elevator etc.
  A number of sample programs to demonstrated the interfacing capabilities.

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Base board
32 inputs using 8-way four DIP switches. Each input of these switches has an
LED indication.
32 outputs through output ports of FPGA connected to LEDs.
16x2 Alpha–Numeric LCD display with back-light through 10 PIN FRC
Connectors to FPGA/CPLD port pins.
Six-digit 7-segment displays connected through 10 PIN FRC connector to FPGA/CPLD port pins .
4x4 key matrix.
10 MHz, 5 MHz, 1MHz, 500 KHz, 100 KHz - five different clock frequencies.
On-board Relay connected using 10 pin FRC to FPGA/CPLD port pins.
On-board Traffic Light Simulator connected to FPGA/CPLD port pins using 16 pin FRC.
On-board ADC connected to FPGA/CPLD port pins using 16 pin FRC.
On-board DAC is provided to generate different waveforms and it is connected to FPGA/CPLD port pins using 16 pin FRC.
On-board four level Elevator connected to FPGA/CPLD port pins using 16 pin FRC.
Two-pin reliamate is provided on the board to connect external DC motor and it is connected to FPGA/CPLD port pins using 10 pin FRC.
5-way PowerMate is provided to connect external stepper motor and it is connected to FPGA/CPLD port pins using 10 pin FRC.
26-PIN FRC header with Cable for connecting to ALS standard interfaces.
8 inputs using 0ne DIP switches. Each input of these switches has an LED indication.
One push button
Four sets of 20x2 female berg connector to plug the DAUGHTER BOARD.

 

DAUGHTER BOARD 1

XLINIX XC3S50 – FPGA
NVROM for stand alone programming.
JTAG connector (10 PIN FRC connector) for
Boundary scan programming.
Mode selection jumpers and LED indication.
Four sets of 20×2 Male Berg connector for plugging on to the main
board.

 

DAUGHTER BOARD 2

XLINIX XC9572PC44 – CPLD
JTAG connector (10 PIN FRC connector) for Boundary scan programming.
Four sets of 20×2 Male Berg connector for plugging on to the main board.

 

DAUGHTER BOARD 3

XLINIX XC3S400 – FPGA
NVROM for stand alone programming.
JTAG connector (10 PIN FRC connector) for Boundary scan programming.
Mode selection jumpers and LED indication.
Four sets of 20×2 Male Berg connector for plugging on to the main Board.

System requirements for SDA-CPLD/FPGA Trainer Kit are 256 MB RAM with Operating system of Windows XP/ 2000, CD ROM drive and Internet Connections.

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